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2015

[DAC2015] Jia Zhan, Jin Ouyang, Fen Ge, Jishen Zhao, Yuan Xie, "DimNoC: A Dim Silicon Approach Towards Power-Efficient On-Chip Network", Proceedings of The 52th Design Automation Conference (DAC) , 2015
[ASPDAC2015] Yang Zheng, Cong Xu, Yuan Xie, "Modeling Framework for Cross-point Resistive Memory Design Emphasizing Reliability and Variability Issues", Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific (pp. 112-117). IEEE.
[ASPDAC2015] Qiaosha Zou, Matthew Poremba, Rui He, Wei Yang, Junfeng Zhao, Yuan Xie, "Heterogeneous Architecture Design with Emerging 3D and Non-Volatile Memory Technologies", (Invited Paper) Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific (pp. 785-790). IEEE.

2014

[SLIP2014] Qiaosha Zou, Yuan Xie, "Compact Models and Model Standard for 2.5D and 3D Integration", Proceedings of SLIP (System Level Interconnect Prediction) on System Level Interconnect Prediction Workshop (pp. 1-7). ACM.
[TCAD2014] Zhan, J., Stoimenov, N., Ouyang, J., Thiele, L., Narayanan, V., & Xie, Y, "Optimizing the NoC Slack Through Voltage and Frequency Scaling in Hard Real-Time Embedded Systems", Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on 33.11 (2014): 1632-1643.
[IEEED&T2014] Wulong Liu, Guoqing Chen, Yu Wang, Xue Feng, Yuan Xie, Yidong Huang, Huangzhong Yang, "Exploration of Electrical and Novel Optical Chip-to-Chip Interconnects", IEEE Design and Test, pp.28-35, Vol. 31, No.5, Sept/Oct, 2014
[JETC2014] Wulong Liu, Yu Wang, Yuchun Man, Huangzhong Yang, Yuan Xie, "On-Chip Hybrid Power Supply System for Wireless Sensor Nodes", ACM Journal on Emerging Technologies in Computing Systems (JETC) 10.3 (2014): 23.
[TACO2014] Jue Wang, Xiangyu Dong, Yuan Xie, "Preventing STT-RAM Last-Level Caches from Port Obstruction", ACM Transactions on Architecture and Code Optimization (TACO) 11.3 (2014): 23.
[TACO2014] Jue Wang, Xiangyu Dong, Yuan Xie, Norm Jouppi, "Endurance-Aware Cache Line Management for Non-Volatile Caches", ACM Transactions on Architecture and Code Optimization (TACO)11.1 (2014): 4.
[TACO2014] Jue Wang, Xiangyu Dong, Yuan Xie, "Building and Optimizing MRAM-Based Commodity Memories", ACM Transactions on Architecture and Code Optimization (TACO), Volume 11, No.4, Article 36 (December 2014), 22 pages
[TCAD2014] Wujie Wen, Y. Zhang, Yiran Chen, Yu Wang, Yuan Xie, "PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method", IEEE Transactions on Computer Aids Design (TCAD). pp.1644-1656, Vol.33, No. 11, Nov. 2014.
[JETC2014] Jing Xie, Yang Du, and Yuan Xie, "Testable cross-power domain interface (CPDI) circuit design in monolithic 3D technology", ACM Journal on Emerging Technologies in Computing Systems (JETC),Volume 11, No.1, Article 5 (Sept 2014), 17 pages
[DAC2014] Xiaoming Chen, Yu Wang, Yun Liang, Huazhong Yang, Yuan Xie, "Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs", Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE (pp. 1-6). IEEE.
[ICSICT2014] Pai-Yu Chen, Cong Xu, Yuan Xie, Shimeng Yu, "3D RRAM design and benchmark with 3d NAND FLASH", Proceedings of 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp.1-4, 10/2014
[ISLPED2014] Hsiang-yun Cheng, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut Kandemir, Jack Sampson, Yuan Xie, "EECache: Exploiting Design Choices in Energy-Efficient Last-Level Caches in Chip Multiprocessors", Proceedings of the 2014 international symposium on Low power electronics and design (pp. 303-306). ACM.
[ISQED2014] Ping Chi, Cong Xu, Xiaochu Zhu, Yuan Xie, "Building Energy-Efficient Multi-level Cell STT-RAM Based Cache Through Dynamic Data-Resistance Encoding", Proceedings of 15th International Symposium on Quality Electronic Design (ISQED), pp.639-644, March 2014
[ICCAD2014] Ping Chi, Cong Xu, Tao Zhang, Xiangyu Dong, Yuan Xie, "Using Multi-Level Cell STT-RAM for Fast and Energy-Efficient Local Checkpointing", Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (pp. 301-308). IEEE. IEEE/ACM William J. McCalla ICCAD Best Paper Award
[ISLPED2014] Ping Chi, Wang-Chien Lee, Yuan Xie, "Making B+ Tree Efficient in PCM-Based Main Memory", Proceedings of the 2014 international symposium on Low power electronics and design (pp. 69-74). ACM.
[DAC2014] Xing Hu, Yi Xu, Jun Ma, Guoqing Chen, Yu Hu, Yuan Xie, "TSocket: Thermal Sustainable Power Budgeting", Proceedings of The 51th Design Automation Conference (DAC), 2014
[ASPDAC2014] Xing Hu, Yi Xu, Yu Hu, Yuan Xie, "SwimmingLane: A Composite Approach to Mitigate Voltage Droop Effects in 3D Power Delivery Network", Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific (pp. 550-555). IEEE.
[DAC2014] Xing Hu, Yi Xu, Jun Ma, Guoqing Chen, Yu Hu and Yuan Xie, "Thermal-sustainable power budgeting for dynamic threading", Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE (pp. 1-6). IEEE.
[DAC2014] Wulong Liu, Guoqing Chen, Xue Han, Yu Wang, Huazhong Yang, Yuan Xie, "Design Methodologies for 3D Mixed Signal Integration Circuits: A Practical 12-bit SAR ADC Design Case", Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE (pp. 1-6). IEEE.
[ISVLSI2014] Kaisheng Ma, Huichu Liu, Yang Xiao, Yang Zheng, Xueqing Li, Summet Gupta, Yuan Xie, "Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed", Proceedings of the IEEE omputer Society Annual Symposium on VLSI (ISVLSI), pp.296-301, July 2014
[ISLPED2014] Jue Wang, Xiangyu Dong, Yuan Xie, "Enabling High-Performance LPDDRx-Compatible MRAM", Proceedings of the 2014 international symposium on Low power electronics and design (pp. 339-344). ACM.
[HPCA2014] Zhe Wang, Daniel Jimenez, Cong Xu, Guangyu Sun, Yuan Xie, "Adaptive Placement and Migration Policy for an STT-RAM-Based Hybrid Cache", High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on (pp. 13-24). IEEE.
[GLSVLSI2014] Cong Xu, Dimin Niu, Yang Zheng, Shimeng Yu and Yuan Xie, "Reliability-Aware Cross-Point Resistive Memory Design", Proceedings of the 24th edition of the great lakes symposium on VLSI (pp. 145-150). ACM.
[ICCD2014] JueWang, Xiangyu Dong, Yuan Xie, "Proactive DRAM: A DRAM-initiated Retention Management Scheme", Computer Design (ICCD), 2014 32nd IEEE International Conference on (pp. 22-27). IEEE.
[ASPDAC2014] Cong Xu, Dimin Niu, Shimeng Yu, Yuan Xie, "Modeling and Design Analysis of 3D Vertical Resistive Memory - A Low Cost Cross-Point Architecture", Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific (pp. 825-830). IEEE.
[ICCAD2014] Cong Xu, Pai-Yu Chen, Dimin Niu, Yang Zheng, Shimeng Yu, Yuan Xie, "Architecting 3D Vertical Resistive Memory for Next-Generation Storage Systems", Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (pp. 55-62). IEEE
[ISQED2014] Song Yao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yuan Xie, Huazhong Yang, "Efficient region-aware P/G TSV planning for 3D ICs", Proceedings of 15th International Symposium on Quality Electronic Design (ISQED), pp.171-178, March 2014
[DAC2014] Jia Zhan, Guangyu Sun, Yuan Xie, "NoC-sprinting: Interconnect for fine-grained sprinting in the dark silicon era", Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE (pp. 1-6). IEEE.
[ASPDAC2014] Jia Zhan, Matt Poremba, Yi Xu, Yuan Xie, "NoΔ: Leveraging delta compression for end-to-end memory access in NoC based multicores", Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific (pp. 586-591). IEEE. Best Paper Nomination
[GLSVLSI2014] Tao Zhang, Cong Xu, Ke Chen, Guangyu Sun, Yuan Xie, "3D-SWIFT: A high-performance 3D-stacked Wide IO DRAM", Proceedings of the 24th edition of the great lakes symposium on VLSI (pp. 51-56). ACM. Best Paper Award
[HPCA2014] Tao Zhang, Cong Xu, Guangyu Sun, Yuan Xie, "CREAM: A Concurrent-Refresh-Aware DRAM Memory System.", High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on (pp. 368-379). IEEE.
[ISCA2014] Tao Zhang, Ke Chen, Cong Xu, Guangyu Sun, Tao Wang, Yuan Xie, "Half-DRAM: a High-bandwidth and Low-power DRAM System from the Rethinking of Fine-grained Activation", Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on (pp. 349-360). IEEE.
[MICRO2014] Jishen Zhao, Onur Multu, Yuan Xie, "FIRM: Fair and High-performance Memory Scheduling for Persistent Memory Systems", Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium on (pp. 153-165). IEEE.
[ASPDAC2014] Qiaosha Zou, Dimin Niu, Yan Cao, Yuan Xie, "3DLAT: TSV-Based 3D ICs Crosstalk Minimization Utilizing Less Adjacent Transition Code", Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific (pp. 762-767). IEEE.
[3DIC2014] Qiaosha Zou and Yuan Xie, "A Cost Benefit Analysis: the Impact of Defect Clustering on the Necessity of Pre-bond Tests", 3D Systems Integration Conference (3DIC), 2014 International (pp. 1-7). IEEE.
[3DIC2014] Qiaosha Zou, Jia Zhan, Fen Ge, and Yuan Xie, "Designing Vertical Bandwidth Reconfigurable 3D NoCs for Many Core Systems", 3D Systems Integration Conference (3DIC), 2014 International (pp. 1-7). IEEE.
[GLSVLSI2014] Qiaosha Zou, Tao Zhang, Cong Xu, Yuan Xie, "TSV Power Supply Array Electromigration Lifetime Analysis in 3D IC", Proceedings of the 24th edition of the great lakes symposium on VLSI (pp. 239-240). ACM.

2013

[TACO2013] Xiangyu Dong, Norm Jouppi, Yuan Xie, "A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies", ACM Transactions on Architecture and Code Optimization (TACO), Vol. 10, No. 4, 12/2013
[TACO2013] Jishen Zhao, Guangyu Sun, Gabriel Loh, Yuan Xie, "Optimizing GPU Energy Efficiency with In-Package Graphics Memory and Reconfigurable Memory Interface", ACM Transactions on Architecture and Code Optimization (TACO), Vol.10, No. 4, 12/2013
[TCAD2013] Yibo Chen, Eren Kursun, Dave Motschman, Charles Johnson, Yuan Xie, "Through Silicon Via aware Design Planning for Thermally-efficient 3D Integrated Circuits", IEEE Transactions on Computer Aids Design (TCAD)., pp.1335-1346, Vol.32, No. 9, Sept. 2013
[JETC2013] Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan, "A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays", ACM Journal of Emerging Technologies in Computing Systems., Vol. 9, No. 1, Feb. 2013
[IET-CDS2013] Xiaoming Chen, Hong Luo, Yu Wang, Yu Cao, Yuan Xie, Yuchun Ma, Huazhong Yang, "Evaluation and mitigation of performance degradation under random telegraph noise for digital circuits", IET Circuits, Devices and Systems. pp.273-282, Vol. 7, No. 5, Sept. 2013
[JETC2013] Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan, "A synthesis algorithm for reconfigurable single-electron transistor arrays", ACM Journal of Emerging Technologies in Computing Systems., Vol. 9, No. 1, Feb. 2013
[IEEED&T2013] Xiaoming Chen, Yu Wang, Yu Cao, Yuan Xie, Huazhong Yang, "Assessment of Circuit Optimization Techniques under NBTI", IEEE Design & Test, 2013, 30(6), 40-49.
[JVLSI2013] Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yuan Xie, Tingting Huang, "Thermal-aware P/G TSV planning for IR drop reduction in 3D ICs", Integration, the VLSI Journal 46.1 (2013): 1-9
[ISVLSI2013] Wulong Liu, Yu Wang, Yuchun Man, Huangzhong Yang, Yuan Xie, "Whitespace-Aware TSV Arrangement in 3-D Clock Tree Synthesis", VLSI (ISVLSI), 2013 IEEE Computer Society Annual Symposium on. IEEE, 2013: 115-120

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