Welcome to the Scalable Energy-efficient Architecture Lab

The Scalable Energy-efficient Architecture Lab (SEAL) is a research group advised by Prof. Yuan Xie at The University of California, Santa Barbara in the Department of Electrical and Computer Engineering. SEAL research focuses on, but not limited to, VLSI design, electronic design automation, computer architecture, and embedded systems design. Specifically, recent research projects include EDA tools and architectures for 3D IC design, embedded system synthesis, low power and thermal-aware techniques, robust design techniques related to soft errors and process variation. Research projects are supported by the National Science Foundation (NSF), Defense Advanced Research Projects Agency (DARPA), Semiconductor Research Corporation (SRC), IBM, The Technology Collaborative, Honda, Toyota, Qualcomm, and the Industrial Technology Research Institute (ITRI).


Recent News

(04/2016)[Papers] Congratulations to SEAL members for having 4 papers accepted by ISCA 2016 and 3 papers accepted by DAC 2016! 
(01/2016)[Award] Kaisheng Ma and Shuangchen Li's paper "Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications" published in HPCA (2015) has been selected for Micro's Top Picks 2016.
(01/2016)[Award] Cong Xu's dissertation has been selected as the honorable mention of SPEC Distinguished Dissertation Award 2015, for contributions to modeling, circuit design and microarchitecture for emerging resistive memory.
(01/2016)[Service] Professor Xie has been appointed as the Associate Editor of IEEE Embedded Systems Letters (IEEE ESL) from 2016 to 2018.
(11/2015)[Service] Professor Xie has been appointed as the next Editor-in-Chief of ACM Journal on Emerging Technologies in Computing (JETC) by ACM Publications Board.
(09/2015)[Award] New lab member Peng Gu receives 2015-2016 Holbrook Foundation Fellowship by Institute for Energy Efficiency of UCSB
(07/2015)[Award] Dr. Xie received the [Servive Recognition Award] from ISLPED 2015.
(07/2015)[Conference] MPSoC 2015 is held in Ventra. Dr. Xie serves as general chair.
(02/2015)[Award] Kaisheng Ma, Yang Zheng, and Shuangchen Li, together with PSU and Tsinghua collaborators, won [HPCA 2015 Best Paper Award].
(12/2014)[Award] Jishen Zhao's paper received the [Best Paper Honorable Mention Award] at MICRO-46.
(12/2014)[IEEE Fellow] Yuan Xie is elevated to IEEE Fellow due to contributions in design automation and architecture for 3D ICs.
(10/2014)[Award] Congratulations to Ping Chi for ACM SRC award at ICCAD 2014.
(10/2014)[Award] Congratulations to Ping Chi for [ICCAD 2014 Best Paper Award] (IEEE/ACM William J. McCalla ICCAD Best Paper Award).

Research Highlights

A three dimensional (3D) chip is a stack of multiple device layers with direct vertical interconnects tunneling through them. A key benefit of this approach over a traditional two dimensional chip is the ability to reduce the length of long interconnects.
In recent years, emerging non-volatile memory (NVM) technologies, e.g., Phase-Change RAM (PCRAM), STT-RAM (MRAM) Resistive RAM (RRAM), and Memristors, have gained substantial attentions and a
The challenges in fabricating transistors with diminutive feature sizes in the nanometer regimes have resulted in significant variations in key transistor parameters, such as transistor channel length, gate-oxide thickness, and threshold voltage. This manufacturing variability can  cause... more
Process scaling and aggressive performance improvements have resulted in power consumption becoming a first-order design criterion. For example, the latest Intel Pentium 4 processor (Prescott, 2004) has a power consumption of 103 Watts, almost four times larger than that of the Pentium III (1999).... more
Embedded systems are of great economic importance. Embedded applications include consumer electronics appliance, signal processing, automobile control, aircraft autopilot, and so on. It is estimated that the embedded system market sales was approximately $46 billion in 2004 and expected to grow at... more